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Beeline smartbox pro лог загрузки - Мысли злого плебея

7 фев 2016

03:13 am - Beeline smartbox pro лог загрузки

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===================================================================

     		MT7621   stage1 code 10:40:45 (ASIC)

     		CPU=50000000 HZ BUS=16666666 HZ

==================================================================

Change MPLL source from XTAL to CR...

do MEMPLL setting..

MEMPLL Config : 0x11100000

3PLL mode + External loopback

=== XTAL-40Mhz === DDR-1200Mhz ===

PLL2 FB_DL: 0x7, 1/0 = 526/498 1D000000

PLL3 FB_DL: 0xe, 1/0 = 711/313 39000000

PLL4 FB_DL: 0x17, 1/0 = 569/455 5D000000

do DDR setting..[00320381]

Apply DDR3 Setting...(use customer AC)

          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120

      --------------------------------------------------------------------------------

0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

000E:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1

000F:|    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1

0010:|    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0

0011:|    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0

0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0

rank 0 coarse = 15

rank 0 fine = 80

B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0

opt_dle value:11

DRAMC_R0DELDLY[018]=00002423

==================================================================

		RX	DQS perbit delay software calibration 

==================================================================

1.0-15 bit dq delay value

==================================================================

bit|     0  1  2  3  4  5  6  7  8  9

--------------------------------------

0 |    9 8 7 9 7 7 8 6 4 6 

10 |    8 9 7 11 7 9 

--------------------------------------
 
==================================================================

2.dqs window

x=pass dqs delay value (min~max)center 

y=0-7bit DQ of every group

input delay:DQS0 =35 DQS1 = 36

==================================================================

bit	DQS0	 bit      DQS1

0  (1~69)35  8  (1~65)33

1  (1~68)34  9  (1~66)33

2  (1~66)33  10  (1~71)36

3  (1~68)34  11  (1~67)34

4  (1~68)34  12  (1~70)35

5  (1~68)34  13  (1~68)34

6  (1~64)32  14  (1~69)35

7  (1~68)34  15  (1~68)34

==================================================================

3.dq delay value last

==================================================================

bit|    0  1  2  3  4  5  6  7  8   9

--------------------------------------

0 |    9 9 9 10 8 8 11 7 7 9 

10 |    8 11 8 13 8 11 

==================================================================

==================================================================

     TX  perbyte calibration 

==================================================================

DQS loop = 15, cmp_err_1 = ffff0000 

dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 

dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 

DQ loop=15, cmp_err_1 = ffff0000

dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 

dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 

byte:0, (DQS,DQ)=(8,8)

byte:1, (DQS,DQ)=(8,8)

20,data:88

[EMI] DRAMC calibration passed

 
===================================================================

     		MT7621   stage1 code done 

     		CPU=50000000 HZ BUS=16666666 HZ

===================================================================



U-Boot 1.1.3 (Oct 17 2014 - 17:37:52)


Board: Ralink APSoC DRAM:  256 MB

relocate_code Pointer at: 8ffac000


Config XHCI 40M PLL 

Allocate 16 byte aligned buffer: 8ffe0cd0

Enable NFI Clock

# MTK NAND # : Use HW ECC

NAND ID [C8 DA 90 95 44]

Device not found, ID: c8da

Not Support this Device! 

chip_mode=00000001

Support this Device in MTK table! c8da 

select_chip

[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16

Signature matched and data read!

load_fact_bbt success 2047

load fact bbt success

[mtk_nand] probe successfully!

mtd->writesize=2048 mtd->oobsize=64,	mtd->erasesize=131072  devinfo.iowidth=8

Env addr : 0x800000

.*** Warning - bad CRC, using default environment


============================================ 

Ralink UBoot Version: 4.2.0.6

-------------------------------------------- 

ASIC MT7621A DualCore (MAC to MT7530 Mode)

DRAM_CONF_FROM: Auto-Detection 

DRAM_TYPE: DDR3 

DRAM bus: 16 bit

Xtal Mode=3 OCP Ratio=1/3

Flash component: NAND Flash

Date:Oct 17 2014  Time:17:37:52

============================================ 

icache: sets:256, ways:4, linesz:32 ,total:32768

dcache: sets:256, ways:4, linesz:32 ,total:32768 


 ##### The CPU freq = 880 MHZ #### 

 estimate memory size =256 Mbytes

#Reset_MT7530

set LAN/WAN LLLLW

..Example expects ABI version 2

Actual U-Boot ABI version 2


******************************************

    Uboot StandAlone Entry

******************************************

0, cmd

1, 0x0000000D

cmd : 0x0000000D





Press Ctrl+C to Enter the Main loop...

 0 Example expects ABI version 2

Actual U-Boot ABI version 2


******************************************

    Uboot StandAlone Entry

******************************************

0, boot

Flash Sector Number : 2048.


Bad block detected at 0x59c0, oob_buf[0] is 0x0

NAND Section 6, has bad block at address bece0000, Image Offset 2ce0000

NAND Section 6, has bad block count 1

Bad block detected at 0x16940, oob_buf[0] is 0x0

NAND Section 9, has bad block at address c74a0000, Image Offset b4a0000

NAND Section 9, has bad block count 1



***************************************************


    Sercomm Boot Version 4.10.0
 

***************************************************


Entering Firmware : Everything is OK.


Begin to verify the default image... 

kernel addr: 0x1700100  len: 0x26A49B  crc: 0x2B8C8EB1

........................................calculate_kernel_crc: 0x2B8C8EB1

ok!

First image selected

kernel addr :0xc1300100 

kernel addr :0xC1300100 

## Booting image at c1300100 ...

   Image Name:   Linux Kernel Image

   Image Type:   MIPS Linux Kernel Image (lzma compressed)

   Data Size:    2532443 Bytes =  2.4 MB

   Load Address: 80001000

   Entry Point:  8000f500

.......................................   Verifying Checksum ... OK

   Uncompressing Kernel Image ... OK

 



commandline in boot is : console=ttyS1,57600 ubi.mtd=7 root=ubi0:rootfs rw rootfstype=ubifs  !!!!




No initrd

## Transferring control to Linux (at address 8000f500) ...

## Giving linux memsize in MB, 256


Starting kernel ...

 LINUX started...

 THIS IS ASIC
Linux version 2.6.36+ (eddie@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 SMP Tue Dec 9 05:22:14 CST 2014

 The CPU feqenuce set to 880 MHz
GCMP present
CPU revision is: 0001992f (MIPS 1004Kc)
Software DMA cache coherency
Determined physical RAM map:
 memory: 10000000 @ 00000000 (usable)
Zone PFN ranges:
  Normal   0x00000000 -> 0x00010000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0: 0x00000000 -> 0x00010000
Detected 3 available secondary CPU(s)
PERCPU: Embedded 7 pages/cpu @81204000 s6976 r8192 d13504 u65536
pcpu-alloc: s6976 r8192 d13504 u65536 alloc=16*4096
pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024
Kernel command line: console=ttyS1,57600 ubi.mtd=7 root=ubi0:rootfs rw rootfstype=ubifs
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Writing ErrCtl register=000660c6
Readback ErrCtl register=000660c6
Memory: 251984k/262144k available (5411k kernel code, 10160k reserved, 1759k data, 220k init, 0k highmem)
Hierarchical RCU implementation.
	Verbose stalled-CPUs detection is disabled.
NR_IRQS:128
Trying to install interrupt handler for IRQ24
Trying to install interrupt handler for IRQ25
Trying to install interrupt handler for IRQ22
Trying to install interrupt handler for IRQ9
Trying to install interrupt handler for IRQ10
Trying to install interrupt handler for IRQ11
Trying to install interrupt handler for IRQ12
Trying to install interrupt handler for IRQ13
Trying to install interrupt handler for IRQ14
Trying to install interrupt handler for IRQ16
Trying to install interrupt handler for IRQ17
Trying to install interrupt handler for IRQ18
Trying to install interrupt handler for IRQ19
Trying to install interrupt handler for IRQ20
Trying to install interrupt handler for IRQ21
Trying to install interrupt handler for IRQ23
Trying to install interrupt handler for IRQ26
Trying to install interrupt handler for IRQ27
Trying to install interrupt handler for IRQ28
Trying to install interrupt handler for IRQ15
Trying to install interrupt handler for IRQ8
Trying to install interrupt handler for IRQ29
Trying to install interrupt handler for IRQ30
Trying to install interrupt handler for IRQ31
console [ttyS1] enabled
Calibrating delay loop... 579.58 BogoMIPS (lpj=1159168)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
launch: starting cpu1
launch: cpu1 gone!
CPU revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
launch: starting cpu2
launch: cpu2 gone!
CPU revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
launch: starting cpu3
launch: cpu3 gone!
CPU revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Brought up 4 CPUs
Synchronize counters across 4 CPUs: done.
hrtimer start on CPU1
NET: Registered protocol family 16
release PCIe RST: RALINK_RSTCTRL = 7000000
PCIE PHY initialize
***** Xtal 40MHz *****
start MT7621 PCIe register access
RALINK_RSTCTRL = 7000000
RALINK_CLKCFG1 = 77ffeff8

*************** MT7621 PCIe RC mode *************
PCIE2 no card, disable it(RST&CLK)
pcie_link status = 0x3
RALINK_RSTCTRL= 3000000
*** Configure Device number setting of Virtual PCI-PCI bridge ***
RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
PCIE0 enabled
PCIE1 enabled
interrupt enable status: 300000
Port 1 N_FTS = 1b105000
Port 0 N_FTS = 1b105000
config reg done
init_rt2880pci done
bio: create slab  at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x603fffff pref]
pci 0000:00:00.0: BAR 1: assigned [mem 0x60400000-0x6040ffff]
pci 0000:00:00.0: BAR 1: set to [mem 0x60400000-0x6040ffff] (PCI address [0x60400000-0x6040ffff]
pci 0000:00:01.0: BAR 1: assigned [mem 0x60410000-0x6041ffff]
pci 0000:00:01.0: BAR 1: set to [mem 0x60410000-0x6041ffff] (PCI address [0x60410000-0x6041ffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff 64bit] (PCI address [0x60000000-0x600fffff]
pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0:   bridge window [io  disabled]
pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref]
pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff 64bit]
pci 0000:02:00.0: BAR 0: set to [mem 0x60200000-0x602fffff 64bit] (PCI address [0x60200000-0x602fffff]
pci 0000:02:00.0: BAR 6: assigned [mem 0x60300000-0x6030ffff pref]
pci 0000:00:01.0: PCI bridge to [bus 02-02]
pci 0000:00:01.0:   bridge window [io  disabled]
pci 0000:00:01.0:   bridge window [mem 0x60200000-0x602fffff]
pci 0000:00:01.0:   bridge window [mem 0x60300000-0x603fffff pref]
PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
BAR0 at slot 0 = 0
bus=0x0, slot = 0x0
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60400000
res[1]->end = 6040ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
BAR0 at slot 1 = 0
bus=0x0, slot = 0x1
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60410000
res[1]->end = 6041ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0, irq=0x4
res[0]->start = 60000000
res[0]->end = 600fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x2, slot = 0x1, irq=0x18
res[0]->start = 60200000
res[0]->end = 602fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
Switching to clocksource MIPS
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 5, 163840 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
UDP hash table entries: 128 (order: 0, 6144 bytes)
UDP-Lite hash table entries: 128 (order: 0, 6144 bytes)
NET: Registered protocol family 1
4 CPUs re-calibrate udelay(lpj = 1069056)
squashfs: version 4.0 (2009/01/31) Phillip Lougher
NTFS driver 2.1.29 [Flags: R/W].
fuse init (API version 7.15)
msgmni has been set to 492
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
io scheduler noop registered (default)
Ralink gpio driver initialized
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
brd: module loaded
MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
Allocate 16 byte aligned buffer: 8076c610
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [C8 DA 90 95 44, 00909544]
Device not found, ID: c8da
Not Support this Device!  chip_mode=00000001
[NAND] pagesz:2048 , oobsz: 288,eccbytes: 32
Support this Device in MTK table! c8da  NAND device: Manufacturer ID: 0xc8, Chip ID: 0xda (Unknown NAND 256MiB 3,3V 8-bit)
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 2047
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
Creating 13 MTD partitions on "MT7621-NAND":
0x000000000000-0x00000ff80000 : "ALL"
Bad block detected at 0x59c0, oob_buf[0] is 0x0
Bad block detected at 0x16940, oob_buf[0] is 0x0
0x000000000000-0x000000100000 : "Bootloader"
0x000000100000-0x000000200000 : "Factory"
0x000000200000-0x000001600000 : "sys_data"
0x000001600000-0x000001700000 : "boot_flag"
0x000001700000-0x000001b00000 : "Kernel_1"
0x000001b00000-0x000001f00000 : "Kernel_2"
0x000001f00000-0x000003d00000 : "RootFS_1"
Bad block detected at 0x59c0, oob_buf[0] is 0x0
0x000003d00000-0x000005b00000 : "RootFS_2"
0x000005b00000-0x000008d00000 : "JVM/OSGI1"
0x000008d00000-0x00000bf00000 : "JVM/OSGI2"
Bad block detected at 0x16940, oob_buf[0] is 0x0
0x00000bf00000-0x00000fb00000 : "OSGI data"
0x00000fb00000-0x00000fc00000 : "Ftool"
[mtk_nand] probe successfully!
UBI: attaching mtd7 to ubi0
UBI: physical eraseblock size:   131072 bytes (128 KiB)
UBI: logical eraseblock size:    126976 bytes
UBI: smallest flash I/O unit:    2048
UBI: VID header offset:          2048 (aligned 2048)
UBI: data offset:                4096
Bad block detected at 0x59c0, oob_buf[0] is 0x0
UBI: max. sequence number:       57
UBI: attached mtd7 to ubi0
UBI: MTD device name:            "RootFS_1"
UBI: MTD device size:            30 MiB
UBI: number of good PEBs:        239
UBI: number of bad PEBs:         1
UBI: max. allowed volumes:       128
UBI: wear-leveling threshold:    4096
UBI: number of internal volumes: 1
UBI: number of user volumes:     1
UBI: available PEBs:             0
UBI: total number of reserved PEBs: 239
UBI: number of PEBs reserved for bad PEB handling: 2
UBI: max/mean erase counter: 2/0
UBI: image sequence number:  0
ps: can't get major 253
UBI: background thread "ubi_bgt0d" started, PID 54
GMAC1_MAC_ADRH -- : 0x0000000c
GMAC1_MAC_ADRL -- : 0x432880e2
Ralink APSoC Ethernet Driver Initilization. v3.1  4096 rx/tx descriptors allocated, mtu = 1500!
GMAC1_MAC_ADRH -- : 0x0000000c
GMAC1_MAC_ADRL -- : 0x4328801c
PROC INIT OK!
PPP generic driver version 2.4.2
PPP BSD Compression module registered
PPP MPPE Compression module registered
NET: Registered protocol family 24
PPTP driver version 0.8.5
IMQ driver loaded successfully.
	Hooking IMQ after NAT on PREROUTING.
	Hooking IMQ before NAT on POSTROUTING.
usbcore: registered new interface driver catc
catc: v2.8:CATC EL1210A NetMate USB Ethernet driver
usbcore: registered new interface driver asix
usbcore: registered new interface driver ax88179_178a
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver net1080
usbcore: registered new interface driver cdc_subset
usbcore: registered new interface driver zaurus
register rt2860


=== pAd = c0202000, size = 1262256 ===

<-- RTMPAllocTxRxRingMemory, Status=0
<-- RTMPAllocAdapterBlock, Status=0
pAd->CSRBaseAddress =0xc0100000, csr_addr=0xc0100000!
device_id =0x7662
==>rlt_wlan_chip_onoff(): OnOff:1, Reset= 1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0x20a
RtmpChipOpsEepromHook::e2p_type=0, inf_Type=5
RtmpEepromGetDefault::e2p_dafault=2
NVM is FLASH mode


=== pAd = c0482000, size = 1262256 ===

<-- RTMPAllocTxRxRingMemory, Status=0
<-- RTMPAllocAdapterBlock, Status=0
pAd->CSRBaseAddress =0xc0380000, csr_addr=0xc0380000!
device_id =0x7662
==>rlt_wlan_chip_onoff(): OnOff:1, Reset= 1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0x20a
RtmpChipOpsEepromHook::e2p_type=0, inf_Type=5
RtmpEepromGetDefault::e2p_dafault=2
NVM is FLASH mode
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
FM_OUT value: u4FmOut = 0(0x00000000)
xhc_mtk xhc_mtk: xHCI Host Controller
xhc_mtk xhc_mtk: new USB bus registered, assigned bus number 1
xhc_mtk xhc_mtk: irq 22, io mem 0x1e1c0000
[USB] Device 'xHCI Host Controller xhc_mtk'is plugged into port 1.
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: xHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.36+ xhci-hcd
usb usb1: SerialNumber: xhc_mtk
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
xhc_mtk xhc_mtk: xHCI Host Controller
xhc_mtk xhc_mtk: new USB bus registered, assigned bus number 2
[USB] Device 'xHCI Host Controller xhc_mtk'is plugged into port 2.
usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: xHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.36+ xhci-hcd
usb usb2: SerialNumber: xhc_mtk
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
Ralink APSoC Hardware Watchdog Timer
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (3937 buckets, 15748 max)
matchsize=264
xt_time: kernel timezone is -0000
GRE over IPv4 demultiplexor driver
gre: can't add protocol
ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Linux
ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
arp_tables: (C) 2002 David S. Miller
TCP cubic registered
NET: Registered protocol family 10
IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
Bridge firewalling registered
Ebtables v2.0 registered
L2TP core driver, V2.0
PPPoL2TP kernel driver, V2.0
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
usb 1-2: new high speed USB device number 2 using xhc_mtk
xhc_mtk xhc_mtk: WARN: short transfer on control ep
xhc_mtk xhc_mtk: WARN: short transfer on control ep
xhc_mtk xhc_mtk: WARN: short transfer on control ep
xhc_mtk xhc_mtk: WARN: short transfer on control ep
[USB] Device 'UDisk            Р‰'is plugged into port 1.
usb 1-2: New USB device found, idVendor=abcd, idProduct=1234
usb 1-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-2: Product: UDisk           
usb 1-2: Manufacturer: General 
usb 1-2: SerialNumber: Р‰
usb 1-2: ep 0x1 - rounding interval to 32768 microframes, ep desc says 0 microframes
usb 1-2: ep 0x81 - rounding interval to 32768 microframes, ep desc says 0 microframes
scsi0 : usb-storage 1-2:1.0
scsi 0:0:0:0: Direct-Access     General  UDisk            5.00 PQ: 0 ANSI: 2
UBIFS: mounted UBI device 0, volume 0, name "rootfs"
UBIFS: file system size:   28188672 bytes (27528 KiB, 26 MiB, 222 LEBs)
UBIFS: journal size:       9023488 bytes (8812 KiB, 8 MiB, 72 LEBs)
UBIFS: media format:       w4/r0 (latest is w4/r0)
UBIFS: default compressor: zlib
UBIFS: reserved for root:  0 bytes (0 KiB)
VFS: Mounted root (ubifs filesystem) on device 0:11.
Started WatchDog Timer.
Freeing unused kernel memory: 220k freed

init started: BusyBox v1.15.3 ()

starting pid 67, tty '': '/etc.ro/rcS'
Algorithmics/MIPS FPU Emulator v1.5
UBI: attaching mtd3 to ubi3
UBI: physical eraseblock size:   131072 bytes (128 KiB)
UBI: logical eraseblock size:    126976 bytes
UBI: smallest flash I/O unit:    2048
UBI: VID header offset:          2048 (aligned 2048)
UBI: data offset:                4096
UBI: max. sequence number:       305
UBI: attached mtd3 to ubi3
UBI: MTD device name:            "sys_data"
UBI: MTD device size:            20 MiB
UBI: number of good PEBs:        160
UBI: number of bad PEBs:         0
UBI: max. allowed volumes:       128
UBI: wear-leveling threshold:    4096
UBI: number of internal volumes: 1
UBI: number of user volumes:     1
UBI: available PEBs:             0
UBI: total number of reserved PEBs: 160
UBI: number of PEBs reserved for bad PEB handling: 2
UBI: max/mean erase counter: 3/1
UBI: image sequence number:  1335277104
UBI: background thread "ubi_bgt3d" started, PID 106
UBI device number 3, total 160 LEBs (20316160 bytes, 19.4 MiB), available 0 LEBs (0 bytes), LEB size 126976 bytes (124.0 KiB)
UBIFS: recovery needed
UBIFS: recovery completed
UBIFS: mounted UBI device 3, volume 0, name "sys_data"
UBIFS: file system size:   18157568 bytes (17732 KiB, 17 MiB, 143 LEBs)
UBIFS: journal size:       9023488 bytes (8812 KiB, 8 MiB, 72 LEBs)
UBIFS: media format:       w4/r0 (latest is w4/r0)
UBIFS: default compressor: zlib
UBIFS: reserved for root:  0 bytes (0 KiB)
sc_drv: module license 'Sercomm' taints kernel.
Disabling lock debugging due to kernel taint
sd 0:0:0:0: [sda] 16470720 512-byte logical blocks: (8.43 GB/7.85 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Assuming drive cache: write through
sd 0:0:0:0: [sda] Assuming drive cache: write through
 sda:
sd 0:0:0:0: [sda] Assuming drive cache: write through
sd 0:0:0:0: [sda] Attached SCSI removable disk

starting pid 117, tty '/dev/ttyS1': '/bin/sh'


BusyBox v1.15.3 () built-in shell (ash)
Enter 'help' for a list of built-in commands.

/ # [util_brd.c][read_protected_data_to_ram][199]: key=T9kspnE65X
[main]read config /etc/default.xml success
[CM_XML2RAM]xml file to RAM ret=0
FAT: utf8 is not a recommended IO charset for FAT filesystems, filesystem will be case sensitive!
FAT: utf8 is not a recommended IO charset for FAT filesystems, filesystem will be case sensitive!
ap_name=syslogd, action=start
ap_name=coredump, action=start
Raeth v3.1 (Tasklet)

phy_tx_ring = 0x0ddf0000, tx_ring = 0xaddf0000

phy_rx_ring0 = 0x0de00000, rx_ring0 = 0xade00000
change HW-TRAP to 0x17ccf
set LAN/WAN LLLLW
GMAC1_MAC_ADRH -- : 0x0000944a
GMAC1_MAC_ADRL -- : 0x0c41a15d
CDMA_CSG_CFG = 81000000
GDMA1_FWD_CFG = 20710000
Chain 'FORWARD_WIFI' doesn't exist.
restore_ft_tool get ftool header  sucess
get ftool magic check failed
ap_name=dnrd, action=start
ap_name=phy, action=start
device eth2 entered promiscuous mode
switch reg write offset=2004, value=ff0003
switch reg write offset=2104, value=ff0003
switch reg write offset=2204, value=ff0003
switch reg write offset=2304, value=ff0003
switch reg write offset=2404, value=ff0003
switch reg write offset=2504, value=ff0003
switch reg write offset=2010, value=810000c0
switch reg write offset=2110, value=810000c0
switch reg write offset=2210, value=810000c0
switch reg write offset=2310, value=810000c0
switch reg write offset=2410, value=810000c0
switch reg write offset=2510, value=810000c0
switch reg write offset=2610, value=81000000
switch reg write offset=2710, value=81000000
switch reg write offset=2604, value=20ff0003
switch reg write offset=2704, value=20ff0003
switch reg write offset=2610, value=81000000
ap_name=iptv_bridge, action=start
IPTV Port Mask 0000
old_vlan 1111
switch reg write offset=2014, value=10001
switch reg write offset=2114, value=10001
switch reg write offset=2214, value=10001
switch reg write offset=2314, value=10001
switch reg write offset=2414, value=10002
switch reg write offset=2514, value=10001
REG_ESW_WT_MAC_ATC is 0x7ff0002
device eth2.1 entered promiscuous mode

done.
Set: phy[31].reg[24] = 2ff70
Set: phy[31].reg[12512] = 2125
ap_name=lanip, action=start
br0: port 1(eth2.1) entering learning state
br0: port 1(eth2.1) entering learning state
Set: phy[0].reg[0] = 3300
info, udhcp server (v0.9.7) started
Set: phy[1].reg[0] = 3300
Set: phy[2].reg[0] = 3300
Set: phy[3].reg[0] = 3300
ap_name=telnetd, action=start
ap_name=sshd, action=start
ap_name=httpd, action=start
ap_name=redirect, action=start
bind: Address already in use
ap_name=dnrd, action=start redirect
ap_name=bftpd, action=start
ap_name=smb, action=restart
ap_name=mediaserver, action=restart
killall: smbd: no process killed
killall: minidlna: no process killed
ap_name=firewall, action=start
killall: nmbd: no process killed
br0: port 1(eth2.1) entering forwarding state
nf_conntrack_rtsp v0.6.21 loading
nf_nat_rtsp v0.6.21 loading
ap_name=srt, action=restart
ap_name=rp, action=start
ap_name=mediaserver, action=restart
killall: minidlna: no process killed
ap_name=ntp, action=start
ap_name=hwim, action=start
ap_name=cpm, action=start
ap_name=wanip, action=stop 2
ap_name=dnrd, action=stop wid 2
ap_name=wanip, action=stop 3
ap_name=igmp_proxy, action=stop 3
ap_name=dnrd, action=stop wid 3
ap_name=igd_upnp, action=start
ap_name=wlan, action=start
interface ra1 does not exist!
ifconfig: SIOCGIFFLAGS: No such device
device ra0 is not a slave of br0
build time = 
20140408060640a
rom patch for E3 IC

platform = 
ALPS
hw/sw version =
patch version = 
FW Version:0.0.00 Build:1
Build Time:201406241830____
fw for E3 IC
RX[0] DESC af67f000 size = 4096
RX[1] DESC af690000 size = 4096
RTMP_TimerListAdd: add timer obj c0522c34!
RTMP_TimerListAdd: add timer obj c0496258!
RTMP_TimerListAdd: add timer obj c0495e3c!
RTMP_TimerListAdd: add timer obj c0496228!
RTMP_TimerListAdd: add timer obj c0496574!
RTMP_TimerListAdd: add timer obj c04964a4!
RTMP_TimerListAdd: add timer obj c04964d4!
RTMP_TimerListAdd: add timer obj c049950c!
RTMP_TimerListAdd: add timer obj c04990f0!
RTMP_TimerListAdd: add timer obj c04994dc!
RTMP_TimerListAdd: add timer obj c0499828!
RTMP_TimerListAdd: add timer obj c0499758!
RTMP_TimerListAdd: add timer obj c0499788!
RTMP_TimerListAdd: add timer obj c049c7c0!
RTMP_TimerListAdd: add timer obj c049c3a4!
RTMP_TimerListAdd: add timer obj c049c790!
RTMP_TimerListAdd: add timer obj c049cadc!
RTMP_TimerListAdd: add timer obj c049ca0c!
RTMP_TimerListAdd: add timer obj c049ca3c!
RTMP_TimerListAdd: add timer obj c049fa74!
RTMP_TimerListAdd: add timer obj c049f658!
RTMP_TimerListAdd: add timer obj c049fa44!
RTMP_TimerListAdd: add timer obj c049fd90!
RTMP_TimerListAdd: add timer obj c049fcc0!
RTMP_TimerListAdd: add timer obj c049fcf0!
RTMP_TimerListAdd: add timer obj c04a2d28!
RTMP_TimerListAdd: add timer obj c04a290c!
RTMP_TimerListAdd: add timer obj c04a2cf8!
RTMP_TimerListAdd: add timer obj c04a3044!
RTMP_TimerListAdd: add timer obj c04a2f74!
RTMP_TimerListAdd: add timer obj c04a2fa4!
RTMP_TimerListAdd: add timer obj c04a5fdc!
RTMP_TimerListAdd: add timer obj c04a5bc0!
RTMP_TimerListAdd: add timer obj c04a5fac!
RTMP_TimerListAdd: add timer obj c04a62f8!
RTMP_TimerListAdd: add timer obj c04a6228!
RTMP_TimerListAdd: add timer obj c04a6258!
RTMP_TimerListAdd: add timer obj c04a9290!
RTMP_TimerListAdd: add timer obj c04a8e74!
RTMP_TimerListAdd: add timer obj c04a9260!
RTMP_TimerListAdd: add timer obj c04a95ac!
RTMP_TimerListAdd: add timer obj c04a94dc!
RTMP_TimerListAdd: add timer obj c04a950c!
RTMP_TimerListAdd: add timer obj c04ac544!
RTMP_TimerListAdd: add timer obj c04ac128!
RTMP_TimerListAdd: add timer obj c04ac514!
RTMP_TimerListAdd: add timer obj c04ac860!
RTMP_TimerListAdd: add timer obj c04ac790!
RTMP_TimerListAdd: add timer obj c04ac7c0!
RTMP_TimerListAdd: add timer obj c04ce984!
RTMP_TimerListAdd: add timer obj c04ceaa0!
RTMP_TimerListAdd: add timer obj c04ce9b0!
RTMP_TimerListAdd: add timer obj c04c6134!
E2pAccessMode=2
cfg_mode=9
cfg_mode=9
wmode_band_equal(): Band Equal!
APSDCapable[0]=0
APSDCapable[1]=0
APSDCapable[2]=0
APSDCapable[3]=0
APSDCapable[4]=0
APSDCapable[5]=0
APSDCapable[6]=0
APSDCapable[7]=0
APSDCapable[8]=0
APSDCapable[9]=0
APSDCapable[10]=0
APSDCapable[11]=0
APSDCapable[12]=0
APSDCapable[13]=0
APSDCapable[14]=0
APSDCapable[15]=0
Key1Str is Invalid key length(0) or Type(0)
Key1Str is Invalid key length(0) or Type(0)
Key2Str is Invalid key length(0) or Type(0)
Key2Str is Invalid key length(0) or Type(0)
Key3Str is Invalid key length(0) or Type(0)
Key3Str is Invalid key length(0) or Type(0)
Key4Str is Invalid key length(0) or Type(0)
Key4Str is Invalid key length(0) or Type(0)
1. Phy Mode = 14
get_chl_grp:illegal channel (167)
get_chl_grp:illegal channel (167)
get_chl_grp:illegal channel (169)
get_chl_grp:illegal channel (169)
get_chl_grp:illegal channel (171)
get_chl_grp:illegal channel (171)
get_chl_grp:illegal channel (173)
get_chl_grp:illegal channel (173)
Country Region from e2p = ffff
mt76x2_read_temp_info_from_eeprom:: is_temp_tx_alc=0, temp_tx_alc_enable=0
mt76x2_read_tx_alc_info_from_eeprom:: is_ePA_mode=0, ePA_type=3
mt76x2_read_tx_alc_info_from_eeprom:: [5G band] high_temp_slope=0, low_temp_slope=0
mt76x2_read_tx_alc_info_from_eeprom:: [2G band] high_temp_slope=0, low_temp_slope=0
mt76x2_read_tx_alc_info_from_eeprom:: [5G band] tc_lower_bound=0, tc_upper_bound=0
mt76x2_read_tx_alc_info_from_eeprom:: [2G band] tc_lower_bound=0, tc_upper_bound=0
mt76x2_get_external_lna_gain::LNA type=0x11, BLNAGain=0x0, ALNAGain0=0x0, ALNAGain1=0x0, ALNAGain2=0x0
2. Phy Mode = 14
RTMP_TimerListAdd: add timer obj c04936a8!
RTMP_TimerListAdd: add timer obj c049695c!
RTMP_TimerListAdd: add timer obj c0499c10!
RTMP_TimerListAdd: add timer obj c049cec4!
RTMP_TimerListAdd: add timer obj c04a0178!
RTMP_TimerListAdd: add timer obj c04a342c!
RTMP_TimerListAdd: add timer obj c04a66e0!
RTMP_TimerListAdd: add timer obj c04a9994!
RTMP_TimerListAdd: add timer obj c04c5e48!
3. Phy Mode = 14
andes_pci_fw_init
0x1300 = 00073200
AntCfgInit: primary/secondary ant 0/1
andes_load_cr:cr_type(2)
ChipStructAssign(): MT76x2 hook !
RTMPSetPhyMode: channel is out of range, use first channel=0 
MCS Set = ff ff 00 00 01
TX0 power compensation = 0x38
TX1 power compensation = 0x38
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 0, false cca 592
UpdateChannelInfo: chan 0, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 1, false cca 721
UpdateChannelInfo: chan 1, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 2, false cca 274
UpdateChannelInfo: chan 2, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 3, false cca 1848
UpdateChannelInfo: chan 3, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 4, false cca 769
UpdateChannelInfo: chan 4, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 5, false cca 4095
UpdateChannelInfo: chan 5, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 6, false cca 6454
UpdateChannelInfo: chan 6, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 7, false cca 1646
UpdateChannelInfo: chan 7, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 8, false cca 1144
UpdateChannelInfo: chan 8, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 9, false cca 879
UpdateChannelInfo: chan 9, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 10, false cca 953
UpdateChannelInfo: chan 10, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 11, false cca 1538
UpdateChannelInfo: chan 11, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
UpdateChannelInfo: chan 12, false cca 211
UpdateChannelInfo: chan 12, BusyTime 0, duration 400
RTMP_TimerListAdd: add timer obj c04c6424!
mt76x2_bbp_adjust():rf_bw=1, ext_ch=3, PrimCh=13, HT-CentCh=11, VHT-CentCh=0
mt76x2_single_sku::DefaultTargetPwr = 36
mt76x2_single_sku::DefaultTargetPwr = 0x24, delta_power = 0x0
APStartUp(): AP Set CentralFreq at 11(Prim=13, HT-CentCh=11, VHT-CentCh=0, BBP_BW=1)
mt76x2_calibration(channel = 11)
The 2-BSSID mode is enabled, the BSSID byte5 MUST be the multiple of 2
Main bssid = 94:4a:0c:41:a1:5d
mt76x2_reinit_agc_gain:original agc_vga0 = 0x5c, agc_vga1 = 0x5c
mt76x2_reinit_agc_gain:updated agc_vga0 = 0x5c, agc_vga1 = 0x5c
mt76x2_reinit_hi_lna_gain:original hi_lna0 = 0x27, hi_lna1 = 0x27
mt76x2_reinit_hi_lna_gain:updated hi_lna0 = 0x27, hi_lna1 = 0x27
original vga value(chain0) = 5c
original vga value(chain1) = 5c
<==== rt28xx_init, Status=0
RTMPDrvOpen(1):Check if PDMA is idle!
RTMPDrvOpen(2):Check if PDMA is idle!
device ra0 entered promiscuous mode
br0: port 2(ra0) entering learning state
br0: port 2(ra0) entering learning state
device rai0 is not a slave of br0
build time = 
20140408060640a
rom patch for E3 IC

platform = 
ALPS
hw/sw version = 
patch version = 
FW Version:0.0.00 Build:1
Build Time:201406241830____
fw for E3 IC
RX[0] DESC af4f1000 size = 4096
RX[1] DESC af4f2000 size = 4096
RTMP_TimerListAdd: add timer obj c02a2c34!
RTMP_TimerListAdd: add timer obj c0216258!
RTMP_TimerListAdd: add timer obj c0215e3c!
RTMP_TimerListAdd: add timer obj c0216228!
RTMP_TimerListAdd: add timer obj c0216574!
RTMP_TimerListAdd: add timer obj c02164a4!
RTMP_TimerListAdd: add timer obj c02164d4!
RTMP_TimerListAdd: add timer obj c021950c!
RTMP_TimerListAdd: add timer obj c02190f0!
RTMP_TimerListAdd: add timer obj c02194dc!
RTMP_TimerListAdd: add timer obj c0219828!
RTMP_TimerListAdd: add timer obj c0219758!
RTMP_TimerListAdd: add timer obj c0219788!
RTMP_TimerListAdd: add timer obj c021c7c0!
RTMP_TimerListAdd: add timer obj c021c3a4!
RTMP_TimerListAdd: add timer obj c021c790!
RTMP_TimerListAdd: add timer obj c021cadc!
RTMP_TimerListAdd: add timer obj c021ca0c!
RTMP_TimerListAdd: add timer obj c021ca3c!
RTMP_TimerListAdd: add timer obj c021fa74!
RTMP_TimerListAdd: add timer obj c021f658!
RTMP_TimerListAdd: add timer obj c021fa44!
RTMP_TimerListAdd: add timer obj c021fd90!
RTMP_TimerListAdd: add timer obj c021fcc0!
RTMP_TimerListAdd: add timer obj c021fcf0!
RTMP_TimerListAdd: add timer obj c0222d28!
RTMP_TimerListAdd: add timer obj c022290c!
RTMP_TimerListAdd: add timer obj c0222cf8!
RTMP_TimerListAdd: add timer obj c0223044!
RTMP_TimerListAdd: add timer obj c0222f74!
RTMP_TimerListAdd: add timer obj c0222fa4!
RTMP_TimerListAdd: add timer obj c0225fdc!
RTMP_TimerListAdd: add timer obj c0225bc0!
RTMP_TimerListAdd: add timer obj c0225fac!
RTMP_TimerListAdd: add timer obj c02262f8!
RTMP_TimerListAdd: add timer obj c0226228!
RTMP_TimerListAdd: add timer obj c0226258!
RTMP_TimerListAdd: add timer obj c0229290!
RTMP_TimerListAdd: add timer obj c0228e74!
RTMP_TimerListAdd: add timer obj c0229260!
RTMP_TimerListAdd: add timer obj c02295ac!
RTMP_TimerListAdd: add timer obj c02294dc!
RTMP_TimerListAdd: add timer obj c022950c!
RTMP_TimerListAdd: add timer obj c022c544!
RTMP_TimerListAdd: add timer obj c022c128!
RTMP_TimerListAdd: add timer obj c022c514!
RTMP_TimerListAdd: add timer obj c022c860!
RTMP_TimerListAdd: add timer obj c022c790!
RTMP_TimerListAdd: add timer obj c022c7c0!
RTMP_TimerListAdd: add timer obj c024e984!
RTMP_TimerListAdd: add timer obj c024eaa0!
RTMP_TimerListAdd: add timer obj c024e9b0!
RTMP_TimerListAdd: add timer obj c0246134!
E2pAccessMode=2
cfg_mode=14
cfg_mode=14
wmode_band_equal(): Band Not Equal!
APSDCapable[0]=0
APSDCapable[1]=0
APSDCapable[2]=0
APSDCapable[3]=0
APSDCapable[4]=0
APSDCapable[5]=0
APSDCapable[6]=0
APSDCapable[7]=0
APSDCapable[8]=0
APSDCapable[9]=0
APSDCapable[10]=0
APSDCapable[11]=0
APSDCapable[12]=0
APSDCapable[13]=0
APSDCapable[14]=0
APSDCapable[15]=0
Key1Str is Invalid key length(0) or Type(0)
Key2Str is Invalid key length(0) or Type(0)
Key3Str is Invalid key length(0) or Type(0)
Key4Str is Invalid key length(0) or Type(0)
1. Phy Mode = 49
get_chl_grp:illegal channel (167)
get_chl_grp:illegal channel (167)
get_chl_grp:illegal channel (169)
get_chl_grp:illegal channel (169)
get_chl_grp:illegal channel (171)
get_chl_grp:illegal channel (171)
get_chl_grp:illegal channel (173)
get_chl_grp:illegal channel (173)
Country Region from e2p = ffff
mt76x2_read_temp_info_from_eeprom:: is_temp_tx_alc=0, temp_tx_alc_enable=0
mt76x2_read_tx_alc_info_from_eeprom:: is_ePA_mode=0, ePA_type=3
mt76x2_read_tx_alc_info_from_eeprom:: [5G band] high_temp_slope=0, low_temp_slope=0
mt76x2_read_tx_alc_info_from_eeprom:: [2G band] high_temp_slope=0, low_temp_slope=0
mt76x2_read_tx_alc_info_from_eeprom:: [5G band] tc_lower_bound=0, tc_upper_bound=0
mt76x2_read_tx_alc_info_from_eeprom:: [2G band] tc_lower_bound=0, tc_upper_bound=0
mt76x2_get_external_lna_gain::LNA type=0x11, BLNAGain=0x0, ALNAGain0=0x0, ALNAGain1=0x0, ALNAGain2=0x0
2. Phy Mode = 49
RTMP_TimerListAdd: add timer obj c02136a8!
RTMP_TimerListAdd: add timer obj c021695c!
br0: port 2(ra0) entering forwarding state
RTMP_TimerListAdd: add timer obj c0219c10!
RTMP_TimerListAdd: add timer obj c021cec4!
RTMP_TimerListAdd: add timer obj c0220178!
RTMP_TimerListAdd: add timer obj c022342c!
RTMP_TimerListAdd: add timer obj c02266e0!
RTMP_TimerListAdd: add timer obj c0229994!
RTMP_TimerListAdd: add timer obj c0245e48!
3. Phy Mode = 49
andes_pci_fw_init
0x1300 = 00073200
AntCfgInit: primary/secondary ant 0/1
andes_load_cr:cr_type(2)
ChipStructAssign(): MT76x2 hook !
RTMPSetPhyMode: channel is out of range, use first channel=0 
MCS Set = ff ff 00 00 01
TX0 power compensation = 0x38
TX1 power compensation = 0x38
mt76x2_single_sku::DefaultTargetPwr = 26
mt76x2_single_sku::DefaultTargetPwr = 0x1a, delta_power = 0x0
UpdateChannelInfo: chan 0, false cca 1184
UpdateChannelInfo: chan 0, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 26
mt76x2_single_sku::DefaultTargetPwr = 0x1a, delta_power = 0x0
UpdateChannelInfo: chan 1, false cca 935
UpdateChannelInfo: chan 1, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 26
mt76x2_single_sku::DefaultTargetPwr = 0x1a, delta_power = 0x0
UpdateChannelInfo: chan 2, false cca 31
UpdateChannelInfo: chan 2, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 26
mt76x2_single_sku::DefaultTargetPwr = 0x1a, delta_power = 0x0
UpdateChannelInfo: chan 3, false cca 96
UpdateChannelInfo: chan 3, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 4, false cca 6
UpdateChannelInfo: chan 4, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 5, false cca 535
UpdateChannelInfo: chan 5, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 6, false cca 432
UpdateChannelInfo: chan 6, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 7, false cca 24
UpdateChannelInfo: chan 7, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 8, false cca 308
UpdateChannelInfo: chan 8, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 9, false cca 9
UpdateChannelInfo: chan 9, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 10, false cca 16
UpdateChannelInfo: chan 10, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 11, false cca 58
UpdateChannelInfo: chan 11, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 12, false cca 184
UpdateChannelInfo: chan 12, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 13, false cca 69
UpdateChannelInfo: chan 13, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 14, false cca 591
UpdateChannelInfo: chan 14, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 15, false cca 247
UpdateChannelInfo: chan 15, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 16, false cca 26
UpdateChannelInfo: chan 16, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 17, false cca 1084
UpdateChannelInfo: chan 17, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 18, false cca 393
UpdateChannelInfo: chan 18, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 19, false cca 667
UpdateChannelInfo: chan 19, BusyTime 0, duration 400
mt76x2_single_sku::DefaultTargetPwr = 29
mt76x2_single_sku::DefaultTargetPwr = 0x1d, delta_power = 0x0
UpdateChannelInfo: chan 20, false cca 778
UpdateChannelInfo: chan 20, BusyTime 0, duration 400
RTMP_TimerListAdd: add timer obj c0246424!
mt76x2_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=44, HT-CentCh=46, VHT-CentCh=42
mt76x2_single_sku::DefaultTargetPwr = 26
mt76x2_single_sku::DefaultTargetPwr = 0x1a, delta_power = 0x0
APStartUp(): AP Set CentralFreq at 42(Prim=44, HT-CentCh=46, VHT-CentCh=42, BBP_BW=2)
mt76x2_calibration(channel = 42)
Main bssid = 94:4a:0c:41:a1:5f
mt76x2_reinit_agc_gain:original agc_vga0 = 0x5c, agc_vga1 = 0x5c
mt76x2_reinit_agc_gain:updated agc_vga0 = 0x5c, agc_vga1 = 0x5c
mt76x2_reinit_hi_lna_gain:original hi_lna0 = 0x27, hi_lna1 = 0x27
mt76x2_reinit_hi_lna_gain:updated hi_lna0 = 0x27, hi_lna1 = 0x27
original vga value(chain0) = 5c
original vga value(chain1) = 5c
<==== rt28xx_init, Status=0
RTMPDrvOpen(1):Check if PDMA is idle!
RTMPDrvOpen(2):Check if PDMA is idle!
device rai0 entered promiscuous mode
br0: port 3(rai0) entering learning state
br0: port 3(rai0) entering learning state
ap_name=wlan_guest_portal, action=start
ap_name=qtbl, action=start
Insert quick routing module ...
 ######DUMP QUICK TABLE FUNC ADDR#######
 skb_dev_in_qtl:c3ee8138
 CheckSumModify:c3ee7000
 update_conntrack_time:c3ee77e0
 matchFromLan:c3ee7818
 matchFromWan:c3ee74fc
 doMatch:c3ee8524
 MyCheckSum:c3ee7104
 CheckSumDlt:c3ee714c
 checkEntry:c3ee7fd0
 delEntry:c3ee73d8
 addEntry:c3ee7e8c
 checkValidQTEntry:c3ee72f8
 updateQtlWhenPktXmit:c3ee81bc
 qtbl_read_proc:c3ee7b7c
 qtbl_write_proc:c3ee7af8
 ######DUMP QUICK TABLE FUNC ADDR END#######
ap_name=hw_nat, action=start
Ralink HW NAT Module Enabled
ap_name=cron, action=start
ap_name=networkmap, action=start
sh: can't create /proc/sys/kernel/disable_kswapd: nonexistent directory
nmap_main.c[nmap_wait_and_process_thread_func][437][57]:packet handle process pid 1724
nmap_main.c[nmap_wait_and_process_thread_func][437][57]:packet handle process pid 1725
nmap_main.c[nmap_wait_and_process_thread_func][437][57]:packet handle process pid 1726
nmap_main.c[nmap_wait_and_process_thread_func][437][57]:packet handle process pid 1727
nmap_main.c[nmap_wait_and_process_thread_func][437][57]:packet handle process pid 1728
nmap_main.c[nmap_detect_thread_func][381][57]:active detect process pid 1729
nmap_main.c[nmap_refresh_thread_func][393][57]:refresh process pid 1730
nmap_main.c[nmap_server_thread_func][446][57]:server process pid 1731
ap_name=switch, action=start
br0: port 3(rai0) entering forwarding state
ap_name=qos_service, action=start
Init Ingress Classify module ...
Change DHCP WAN match  from <0> to <1>

Change l2tp control match  from <0> to <1>

Change iptv packet classify from <0> to <1>

Add dscp match  from range idx=0,start_dscp=34,end_dscp=34
Change dscp match  from <0> to <1>

switch reg write offset=44, value=161117
switch reg write offset=2004, value=2ff0403
switch reg write offset=2104, value=2ff0403
switch reg write offset=2204, value=2ff0403
switch reg write offset=2304, value=2ff0403
switch reg write offset=2404, value=1ff0403
switch reg write offset=94, value=ffff06a5
switch reg write offset=98, value=c1000
switch reg write offset=90, value=80005000
switch reg write offset=94, value=80008000
switch reg write offset=98, value=d1000
switch reg write offset=90, value=80005001
switch reg write offset=94, value=3
switch reg write offset=98, value=0
switch reg write offset=90, value=80009000
switch reg write offset=94, value=f000070
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b000
switch reg write offset=94, value=ffffff03
switch reg write offset=98, value=d1008
switch reg write offset=90, value=80005002
switch reg write offset=94, value=ffffc021
switch reg write offset=98, value=d100a
switch reg write offset=90, value=80005003
switch reg write offset=94, value=d
switch reg write offset=98, value=0
switch reg write offset=90, value=80009001
switch reg write offset=94, value=f000070
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b001
switch reg write offset=94, value=1
switch reg write offset=98, value=0
switch reg write offset=90, value=80009002
switch reg write offset=94, value=b000030
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b002
switch reg write offset=94, value=8000800
switch reg write offset=98, value=8100c
switch reg write offset=90, value=80005004
switch reg write offset=94, value=10
switch reg write offset=98, value=0
switch reg write offset=90, value=80009003
switch reg write offset=94, value=e000060
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b003
switch reg write offset=94, value=1000100
switch reg write offset=98, value=80f00
switch reg write offset=90, value=80005005
switch reg write offset=94, value=20
switch reg write offset=98, value=0
switch reg write offset=90, value=80009004
switch reg write offset=94, value=d000050
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b004
switch reg write offseChange RxRingThrehold  from <512> to <1024>

t=94, value=fc0088
switch reg write offset=98, value=a0f00
switch reg write offset=90, value=80005006
switch reg write offset=94, value=40
switch reg write offset=98, value=0
switch reg write offset=90, value=80009005
switch reg write offset=94, value=c000040
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b005
switch reg write offset=94, value=ffff944a
switch reg write offset=98, value=80f00
switch reg write offset=90, value=80005007
switch reg write offset=94, value=ffff0c41
switch reg write offset=98, value=80f02
switch reg write offset=90, value=80005008
switch reg write offset=94, value=ffffa15d
switch reg write offset=98, value=80f04
switch reg write offset=90, value=80005009
switch reg write offset=94, value=380
switch reg write offset=98, value=0
switch reg write offset=90, value=80009006
switch reg write offset=94, value=8000000
switch reg write offset=98, value=0
switch reg write offset=90, value=8000b006
switch reg write offset=1600, value=80008000
switch reg write offset=1604, value=80008437
switch reg write offset=1608, value=80000000
switch reg write offset=1610, value=80000000
switch reg write offset=1618, value=80000000
switch reg write offset=1620, value=80000000
switch reg write offset=1628, value=80000000
switch reg write offset=1630, value=80000000
switch reg write offset=1638, value=80000000
switch reg write offset=48, value=9080000
switch reg write offset=4c, value=1b581250
switch reg write offset=50, value=2da824a0
switch reg write offset=54, value=3ff836f0
Set: phy[0].reg[4] = 01e1
Set: phy[1].reg[4] = 01e1
Set: phy[2].reg[4] = 01e1
Set: phy[3].reg[4] = 01e1
Set: phy[4].reg[4] = 01e1
switch reg write offset=1fe0, value=20087864
hrtimer: interrupt took 35489 ns

~ #